| INCLOSURE CONFIGURATION | PIN GRID ARRAY |
| INCLOSURE MATERIAL | PLASTIC |
| OUTPUT LOGIC FORM | COMPLEMENTARY-METAL OXIDE-SEMICONDUCTOR LOGIC |
| PART NAME ASSIGNED BY CONTROLLING AGENCY | FIELD PROGRAMMABLE GATE ARRAY |
| OPERATING TEMP RANGE | -40.0 TO 100.0 CELSIUS |
| SPECIAL FEATURES | CLB MATRIX 56X56, 3136 TOTAL CLBS; 7448 LOGIC CELLS; 7168 FLIP-FLOPS; 100352 MAX RAM BITS; 1924992 REQUIRED CONFIGURATION BITS; 448 INPUTS; INTERNAL 3-STATE BUS COMPATIBILITY; 8 GLOBAL LOW-SKEW CLOCK OR SIGNAL DISTRIBUTION NETWORKS; IEEE 1149.1 COMPATIBLE BOUNDARY SCAN; PROGRAMMABLE INPUT PULL-UP OR PULL-DOWN RESISTORS |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 3.6 VOLTS MAXIMUM TOTAL SUPPLY |