| DESIGN FUNCTION AND QUANTITY | 824 GATE, ARRAY |
| BODY HEIGHT | 2.80 MILLIMETERS NOMINAL |
| BODY LENGTH | 35.00 MILLIMETERS NOMINAL |
| BODY WIDTH | 35.00 MILLIMETERS NOMINAL |
| CAPITANCE RATING PER CHARACTERISTIC | 10.0 INPUT PICOFARADS MAXIMUM |
| CURRENT RATING PER CHARACTERISTIC | 10.0 NANOAMPERES MAXIMUM SUPPLY AND 35.0 MILLIAMPERES NOMINAL TOTAL SUPPLY |
| FEATURES PROVIDED | 3-STATE OUTPUT AND ELECTROSTATIC SENSITIVE |
| HYBRID TECHNOLOGY TYPE | MULTICHIP |
| III OVERALL HEIGHT | 3.20 MILLIMETERS NOMINAL |
| III OVERALL LENGTH | 35.00 MILLIMETERS NOMINAL |
| III OVERALL WIDTH | 35.00 MILLIMETERS NOMINAL |
| INCLOSURE CONFIGURATION | PIN GRID ARRAY |
| PART NAME ASSIGNED BY CONTROLLING AGENCY | MICROCIRCUIT,DIGITAL |
| PROPRIETARY CHARACTERISTICS | PACS |
| OPERATING TEMP RANGE | -40.0 TO 100.0 DEG CELSIUS |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC AND COMPLEMENTARY-METAL OXIDE-SEMICONDUCTOR LOGIC |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 0.5 VOLTS MINIMUM INPUT AND 4.0 VOLTS MAXIMUM INPUT |
| STORAGE TEMP RANGE | -65.0 TO 150.0 DEG CELSIUS |
| TERMINAL TYPE AND QUANTITY | 1152 PIN |
| TERMINAL SURFACE TREATMENT | SOLDER |