| BODY HEIGHT | 0.045 INCHES MINIMUM AND 0.390 INCHES MAXIMUM |
| BODY LENGTH | 0.335 INCHES MINIMUM AND 0.390 INCHES MAXIMUM |
| BODY WIDTH | 0.235 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
| CRITICALITY CODE JUSTIFICATION | CBBL |
| DESIGN FUNCTION AND QUANTITY | 4 GATE, NAND |
| FEATURES PROVIDED | ELECTROSTATIC SENSITIVE |
| INCLOSURE CONFIGURATION | FLAT PACK |
| INCLOSURE MATERIAL | CERAMIC |
| PART NAME ASSIGNED BY CONTROLLING AGENCY | ADVANCED CMOS, QUAD TWO-INPUT NAND GATE, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| OVERALL HEIGHT | 0.045 INCHES MINIMUM AND 0.080 INCHES MAXIMUM |
| OVERALL LENGTH | 0.335 INCHES MINIMUM AND 0.390 INCHES MAXIMUM |
| OVERALL WIDTH | 1.000 INCHES NOMINAL |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS |
| TERMINAL SURFACE TREATMENT | SOLDER |
| TERMINAL TYPE AND QUANTITY | 14 PIN |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 4.5 VOLTS MINIMUM TOTAL SUPPLY AND 5.5 VOLTS MAXIMUM TOTAL SUPPLY |