|
|
National Stock Number: 5962-01-317-3691
Federal Supply Class: 5962
National Item Identification Number: 013173691
Description: MICROCIRCUIT,DIGITAL
Detail: A microcircuit specifically designed to generate, modify, or process electrical signals which operate with two distinct or binary states. These states are commonly referred to as on and off, true and false, high and low, or 1 and 0.
|
Manufacturer Information:
436636-1 | 00752 | L3HARRIS TECHNOLOGIES, INC. | 5962-3830902B2A | 81349 | MILITARY SPECIFICATIONS PROMULGATED BY MILITARY DEPARTMENTS/AGENCIES UNDER AUTHORITY OF DEFENSE STANDARDIZATION MANUAL 4120 3-M | 5962-3830902B2B | 81349 | MILITARY SPECIFICATIONS PROMULGATED BY MILITARY DEPARTMENTS/AGENCIES UNDER AUTHORITY OF DEFENSE STANDARDIZATION MANUAL 4120 3-M | 5962-3830902B2X | 81349 | MILITARY SPECIFICATIONS PROMULGATED BY MILITARY DEPARTMENTS/AGENCIES UNDER AUTHORITY OF DEFENSE STANDARDIZATION MANUAL 4120 3-M | M38510/30902B2A | 81349 | MILITARY SPECIFICATIONS PROMULGATED BY MILITARY DEPARTMENTS/AGENCIES UNDER AUTHORITY OF DEFENSE STANDARDIZATION MANUAL 4120 3-M | M38510/30902B2B | 81349 | MILITARY SPECIFICATIONS PROMULGATED BY MILITARY DEPARTMENTS/AGENCIES UNDER AUTHORITY OF DEFENSE STANDARDIZATION MANUAL 4120 3-M | SNJ54LS153FK | 01295 | TEXAS INSTRUMENTS INCORPORATED | M38510/30902B2X | 81349 | MILITARY SPECIFICATIONS PROMULGATED BY MILITARY DEPARTMENTS/AGENCIES UNDER AUTHORITY OF DEFENSE STANDARDIZATION MANUAL 4120 3-M | MIL-M-38510/309 | 81349 | MILITARY SPECIFICATIONS PROMULGATED BY MILITARY DEPARTMENTS/AGENCIES UNDER AUTHORITY OF DEFENSE STANDARDIZATION MANUAL 4120 3-M |
|
Techincal Specification:
BODY LENGTH | 0.350 INCHES NOMINAL | BODY WIDTH | 0.350 INCHES NOMINAL | CASE OUTLINE SOURCE AND DESIGNATOR | C-2 MIL-M-38510 | DESIGN FUNCTION AND QUANTITY | 2 SELECTOR, DATA, MULTIPLEXER | FEATURES PROVIDED | LOW POWER AND SCHOTTKY AND W/DATA SELECT AND CASCADABLE AND MONOLITHIC | INCLOSURE CONFIGURATION | LEADLESS FLAT PACK | INCLOSURE MATERIAL | CERAMIC | INPUT CIRCUIT PATTERN | DUAL 4 INPUT | OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC | SPECIAL FEATURES | TERMINAL SURFACE TREATMENT ALSO INCLUDES GOLD PLATE |
|
|