| DESIGN FUNCTION AND QUANTITY | 4 GATE, NAND |
| BODY HEIGHT | 0.050 INCHES MINIMUM AND 0.080 INCHES MAXIMUM |
| BODY LENGTH | 0.337 INCHES MINIMUM AND 0.350 INCHES MAXIMUM |
| BODY WIDTH | 0.235 INCHES MINIMUM AND 0.265 INCHES MAXIMUM |
| FEATURES PROVIDED | HIGH RELIABILITY AND SCHOTTKY AND HERMETICALLY SEALED |
| INCLOSURE CONFIGURATION | FLAT PACK |
| INCLOSURE MATERIAL | CERAMIC |
| INPUT CIRCUIT PATTERN | QUAD 2 INPUT |
| PRECIOUS MATERIAL AND LOCATION | LEADS PLATED GOLD |
| PRECIOUS MATERIAL | GOLD |
| PROPRIETARY CHARACTERISTICS | PACS |
| OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| SPECIAL FEATURES | REF VOLTAGE IS SUPPLY VOLTAGE |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 7.0 VOLTS MAXIMUM REFERENCE |
| TERMINAL TYPE AND QUANTITY | 14 PIN |
| TEST DATA DOCUMENT | 98230-0N212120 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |