| BODY HEIGHT | 0.035 INCHES MINIMUM AND 0.050 INCHES MAXIMUM |
| BODY LENGTH | 0.240 INCHES MINIMUM AND 0.250 INCHES MAXIMUM |
| BODY WIDTH | 0.140 INCHES MINIMUM AND 0.150 INCHES MAXIMUM |
| CASE OUTLINE SOURCE AND DESIGNATOR | T0-84 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| DESIGN FUNCTION AND QUANTITY | 2 FLIP-FLOP, J-K, CLOCKED |
| FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND MEDIUM POWER AND MEDIUM SPEED AND PRESETTABLE |
| INCLOSURE CONFIGURATION | FLAT PACK |
| INCLOSURE MATERIAL | GLASS AND METAL |
| INPUT CIRCUIT PATTERN | DUAL 4 INPUT |
| OPERATING TEMP RANGE | +0.0 TO 70.0 CELSIUS |
| OUTPUT LOGIC FORM | DIODE-TRANSISTOR LOGIC |
| MAXIMUM POWER DISSIPATION RATING | 54.0 MILLIWATTS |
| PRECIOUS MATERIAL AND LOCATION | TERMINALS GOLD AND BODY GOLD |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS |
| TIME RATING PER CHACTERISTIC | 60.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT |