| DESIGN FUNCTION AND QUANTITY | 2 GATE, NAND |
| BODY HEIGHT | 0.050 INCHES MINIMUM AND 0.065 INCHES MAXIMUM |
| BODY LENGTH | 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
| BODY WIDTH | 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
| FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS |
| INCLOSURE CONFIGURATION | FLAT PACK |
| INCLOSURE MATERIAL | GLASS AND METAL |
| INPUT CIRCUIT PATTERN | DUAL 4 INPUT |
| PRECIOUS MATERIAL | GOLD |
| PRECIOUS MATERIAL AND LOCATION | TERMINAL SURFACE GOLD |
| PROPRIETARY CHARACTERISTICS | PACS |
| MAXIMUM POWER DISSIPATION RATING | 20.0 MILLIWATTS |
| OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -0.5 VOLTS MINIMUM POWER SOURCE AND 5.5 VOLTS MAXIMUM POWER SOURCE |
| STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS |
| TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
| TERMINAL SURFACE TREATMENT | SOLDER |
| TEST DATA DOCUMENT | 35351-151461 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| TIME RATING PER CHACTERISTIC | 20.00 NANOSECONDS NOMINAL PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT |