| DESIGN FUNCTION AND QUANTITY | 2 GATE, NAND-OR BUFFER |
| BODY HEIGHT | 0.165 INCHES MINIMUM AND 0.185 INCHES MAXIMUM |
| BODY OUTSIDE DIAMETER | 0.335 INCHES MINIMUM AND 0.370 INCHES MAXIMUM |
| CASE OUTLINE SOURCE AND DESIGNATOR | T0-100 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| FEATURES PROVIDED | MONOLITHIC AND HERMETICALLY SEALED AND MEDIUM SPEED AND EXPANDABLE AND POSITIVE OUTPUTS AND GATED OUTPUT AND MEDIUM POWER |
| INCLOSURE CONFIGURATION | CAN |
| INCLOSURE MATERIAL | GLASS AND METAL |
| INPUT CIRCUIT PATTERN | DUAL 5 INPUT |
| PRECIOUS MATERIAL | GOLD |
| PRECIOUS MATERIAL AND LOCATION | TERMINALS GOLD |
| PROPRIETARY CHARACTERISTICS | PACS |
| MAXIMUM POWER DISSIPATION RATING | 34.0 MILLIWATTS |
| OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
| OUTPUT LOGIC FORM | DIODE-TRANSISTOR LOGIC |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -1.5 VOLTS MINIMUM POWER SOURCE AND 5.5 VOLTS MAXIMUM POWER SOURCE |
| STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS |
| TERMINAL TYPE AND QUANTITY | 10 PIN |
| TERMINAL SURFACE TREATMENT | GOLD |