| COMPONENT NAME AND QUANTITY | 2 TRANSISTOR |
| FEATURES PROVIDED | HERMETICALLY SEALED CASE |
| JOINT ELECTRONIC DEVICE ENGINEERING COUNCIL/JEDEC/CASE OUTLINE DESIGNATION | TO-72 ALL TRANSISTOR |
| INTERNAL CONFIGURATION | JUNCTION CONTACT ALL TRANSISTOR |
| INTERNAL JUNCTION CONFIGURATION | NPN ALL TRANSISTOR |
| INCLOSURE MATERIAL | METAL ALL TRANSISTOR |
| PROPRIETARY CHARACTERISTICS | PACS |
| MOUNTING METHOD | TERMINAL ALL TRANSISTOR |
| OVERALL DIAMETER | 0.220 INCHES MINIMUM ALL TRANSISTOR AND 0.240 INCHES MAXIMUM ALL TRANSISTOR |
| OVERALL LENGTH | 0.170 INCHES MINIMUM ALL TRANSISTOR AND 0.210 INCHES MAXIMUM ALL TRANSISTOR |
| SEMICONDUCTOR MATERIAL | SILICON ALL TRANSISTOR |
| SPECIAL FEATURES | MAXIMUM BASE CURRENT OF ONE DEVICE SHALL BE WITHIN 10 MICROAMPERES OF OTHER DEVICE |
| TERMINAL CIRCLE DIAMETER | 0.100 INCHES NOMINAL ALL TRANSISTOR |
| TERMINAL LENGTH | 0.500 INCHES MINIMUM ALL TRANSISTOR |
| TERMINAL TYPE AND QUANTITY | 4 UNINSULATED WIRE LEAD ALL TRANSISTOR |
| COMPONENT FUNCTION RELATIONSHIP | UNMATCHED |